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AUIRS2184(4)S
Recommended Operating Conditions
The input/output logic timing diagram is shown in Figure 1. For proper operation the device should be used
within the recommended conditions. The V S and V SS offset rating are tested with all supplies biased at a 15 V
differential.
Symbol
V B
V S
V HO
V CC
V LO
Definition
High-side floating supply absolute voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
Min
V S + 10
(??)
V S
10
0
Max
V S + 20
600
V B
20
V CC
Units
V
V IN
Logic input voltage (IN & SD )
(???)
V SS
V CC
DT
V SS
Programmable deadtime pin voltage
Logic ground
V SS
-5
V CC
5
T A
Ambient temperature
-40
125
°C
?? Logic operational for V S of -5 V to +600 V. Logic state held for V S of -5 V to –V BS . (Please refer to Design
Tip DT97-3 for more details).
??? HIN and LIN are internally clamped with a 5.2 V zener diode.
Dynamic Electrical Characteristics
Unless otherwise noted, these specifications apply for an operating junction temperature range of -40°C ≤ Tj
≤ 125°C with bias conditions of V BIAS (V CC , V BS ) = 15 V, V SS = COM, C L = 1000 pF.
Symbol
Definition
Min Typ Max Units Test Conditions
t on
t off
t sd
Turn-on propagation delay
Turn-off propagation delay
Shut-down propagation delay
—
—
—
600 900
230 400
220 350
V S = 0 V
V S = 0 V or 600 V
MT on
MT off
t r
t f
Delay matching, HS & LS turn-on
Delay matching , HS & LS turn-off
Turn-on rise time
Turn-off fall time
—
—
—
—
3
15
15
12
90
40
60
35
ns
V S = 0 V
DT
Deadtime: LO turn-off to HO turn-on (DT LO-HO ) &
HO turn-off to LO turn-on (DT HO-LO )
280 375 520
3.9 5 6
μs
R DT = 0 Ω
R DT = 200 kΩ
MDT
Deadtime matching DT LO-HO - DT HO-LO
—
—
0
0
50
600
ns
R DT = 0 Ω
R DT = 200 kΩ
6
www.irf.com
? 2012 International Rectifier
January 08, 2013
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